It is well known that it is important to convert cathode ray tube (CRT) data streams into multi-segment data streams when displaying graphics data on a multi-segment display. A CRT display controller produces a data stream that begins with the top line to be displayed and outputs successive lines until the bottom of the frame is reached. However, displays that utilize multiple segments require input data in a different order than the CRT displays because all of the segments are refreshed simultaneously.
More particularly, data to refresh these display segments are often output in a parallel manner rather than in the sequential manner associated with CRT displays. In such multiple segment display systems multiple streams of data are required, one stream per display segment. During the active video portion of the frame, one line in each segment is driven. At the start of the refresh frame, the data for the first line of each segment is output to that segment. When that line is completed, the next line of each segment is output. Successive lines are sent to the display segments until the end of the longest segment is reached.
A technique that has been utilized to produce multiple data streams is to alter the order that the data is read from the display image buffer where the image is stored prior to being displayed. This type of system is disclosed in U.S. Pat. No. 5,018,076, entitled, "Method and Circuitry for Dual Panel Displays," and assigned to assignee of the present application. Although this type of system works satisfactorily in many applications, there are some disadvantages:
(1) If the display controller also interfaces to a CRT, then it must be able to function in either mode, requiring a larger, more complicated controller implementation.
(2) If the controller must generate data streams for the CRT and multi-segment displays simultaneously, the data streams must be read from the display image buffer independently, requiring approximately twice the data bandwidth from the buffer.
(3) Reading data from multiple segments of the display image buffer results in a non-contiguous address order, preventing use of DRAM page mode techniques commonly implemented to increase memory bandwidth.
Another technique is to use a plurality of FIFO's to create delayed versions of the data stream as described in U.S. Pat. No. 4,816,816, entitled, "Liquid Crystal Display Apparatus," assigned to Casio; and in U.S. patent application Ser. No. 334,059, assigned to Cirrus Logic, Inc., entitled, "Converter for Raster Image Data from Single Segment to Multi-Segment Streams".
A problem with the above mentioned frame buffer system is in the generation of gray level patterns on panels where gray levels are generated by changing display patterns from frame to frame. A system as above described requires that lines of data from the CRT format data streams be displayed on the panels for two consecutive frames: first, when input to the frame buffer occurs and, second, when read from the frame buffer. This presents a particular problem in that the number of gray levels that can be displayed are substantially reduced (in this case by one-half) when utilizing the above mentioned system. Twice as many gray levels can be displayed by a system that provides unique data each panel refresh frame.
Therefore, what is desirable is to provide a frame buffer system that can overcome the above-mentioned problem. By increasing the number of gray levels that can be displayed on a dual panel display, image resolution and, hence, quality is improved.